Research on the design of a fast updatable index generation circuit

2017 Fiscal Year Final Research Report

• Project/Area Number: 26330072
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system
• Research Institution: Meiji University
• Principal Investigator: Sasao Tsutomu 明治大学, 理工学部, 専任教授 (20112013)
• Co-Investigator(Renkei-kenkyūsha): IGUCHI Yukihiro 明治大学, 理工学部, 専任教授 (60201307)
• Research Collaborator: Butler Jon T.
• Project Period (FY): 2014-04-01 – 2018-03-31
• Keywords: 国際研究者交流、米国 / 線形関数 / 関数分解 / ルータ / CAM(連想メモリ） / パターンマッチング / 書き換え可能回路

Outline of Final Research Achievements

Content Addressable Memories (CAMs) are widely used in the routers for the internet, pattern matching, and cache memories in computers. By using CAMs, a high-speed pattern matching is possible. Unfortunately, CAMs are expensive and dissipate high power. The author invented an index generation unit (IGU) that uses general-purpose memories and small amount of hardware. It works as a CAM, but is much less expensive. In this research, the author developed a fast update method for an IGU.

Free Research Field

情報学