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Effective Acquisition of Authentication Information before Shipping for Verification of Authenticity using PUF Technology

Research Project

Project/Area Number 16K16031
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionNational Institute of Advanced Industrial Science and Technology

Principal Investigator

Ogasahara Yasuhiro  国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 主任研究員 (30635298)

Project Period (FY) 2016-04-01 – 2020-03-31
Project Status Completed (Fiscal Year 2019)
Budget Amount *help
¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Fiscal Year 2018: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2017: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
KeywordsPUF / 真贋判定 / 回路設計 / BIST / 真正乱数 / 偽造品対策 / 真正乱数生成 / 集積回路 / 真性乱数生成 / 計算機システム / 電子デバイス・機器 / システムオンチップ
Outline of Final Research Achievements

In this work, we worked on the authentication data collection before shipping of the authentication technology, PUF(Physical Unclonable Function). PUF technology needs to acquire the authentication data from the fabricated LSIs before shipping the products. In addition, PUFs needed to be protected from the attack to extract the authentication data after shipping.
The feature of this work is adopting BIST(Built-In Self Test) technology, and preventing from exploiting the BIST circuits for the attack after shipping by destroying the BIST circuit after the test before shipping. We proposed the circuit structures of BIST circuit with disabling structure. The PUF circuit including the proposed BIST circuit was implemented on the circuit simulation and operation of the whole PUF circuit was validated on the circuit simulation.

Academic Significance and Societal Importance of the Research Achievements

半導体チップの偽造品はすでに多数流通しており、専門的な報告のみならず、一般市民の目に触れる技術ニュース等でも取り上げられている。本研究成果は単にPUF技術の回路を提案する他の研究とは異なり、PUF技術を実際に実装し、製品に搭載して真贋判定の認証システムを運用する上で重要な役割を果たす。
本研究成果により正規の事業者が十分な量の認証情報の取得し、悪意あるものが認証情報を取得することを防ぐことの両方が同時に実現される。さらに、本手法により十分な量の認証情報を取得することにより、最新の攻撃技術である機械攻撃によるPUFへの攻撃に対しても十分な耐性を得ることが可能となる。

Report

(5 results)
  • 2019 Annual Research Report   Final Research Report ( PDF )
  • 2018 Research-status Report
  • 2017 Research-status Report
  • 2016 Research-status Report

Research Products

(4 results)

All 2020 2019 2018

All Journal Article (2 results) (of which Peer Reviewed: 2 results,  Open Access: 2 results) Presentation (1 results) (of which Int'l Joint Research: 1 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge?Response pair acquisition using Built-In Self-Test before shipping2020

    • Author(s)
      Ogasahara Yasuhiro、Hori Yohei、Katashita Toshihiro、Iizuka Tomoki、Awano Hiromitsu、Ikeda Makoto、Koike Hanpei
    • Journal Title

      Integration

      Volume: 71 Pages: 144-153

    • DOI

      10.1016/j.vlsi.2019.12.002

    • Related Report
      2019 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Feasibility of a low-power, low-voltage complementary organic thin film transistor buskeeper physical unclonable function2019

    • Author(s)
      Ogasahara Yasuhiro、Kuribara Kazunori、Shintani Michihiro、Sato Takashi
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 58 Issue: SB Pages: SBBG03-SBBG03

    • DOI

      10.7567/1347-4065/aaf7fd

    • NAID

      210000135297

    • ISSN
      0021-4922, 1347-4065
    • Related Report
      2018 Research-status Report
    • Peer Reviewed / Open Access
  • [Presentation] Feasibility of Low-Power Organic Buskeeper PUF using Low-Voltage-Operation Complementary Organic TFT2018

    • Author(s)
      Yasuhiro Ogasahara
    • Organizer
      The 2018 International Conference on Solid State Devices and Materials
    • Related Report
      2018 Research-status Report
    • Int'l Joint Research
  • [Patent(Industrial Property Rights)] 半導体デバイスのセキュリティ機能の検査装置2019

    • Inventor(s)
      小笠原 泰弘、堀 洋平
    • Industrial Property Rights Holder
      国立研究開発法人 産業技術総合研究所
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2019-122969
    • Filing Date
      2019
    • Related Report
      2019 Annual Research Report

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Published: 2016-04-21   Modified: 2021-02-19  

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