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Design of Fine-Grained Pipelined Systems for Nonvolatile Logic Applications

Research Project

Project/Area Number 23700050
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system/Network
Research InstitutionTohoku University

Principal Investigator

MATSUNAGA SHOUN  東北大学, 省エネルギー・スピントロニクス集積化システムセ ンター, 研究支援者 (80551564)

Project Period (FY) 2011 – 2013
Project Status Completed (Fiscal Year 2013)
Budget Amount *help
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2013: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2012: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Keywords並列処理 / 細粒度パイプライン / 細粒度パワーゲーティング / 非同期 / 不揮発 / SAD / CAM / MTJ素子 / 連想メモリ / 国際情報交換 / カナダ / 機能メモリ / パイプライン / 国際情報交流
Research Abstract

In this research, fine-grained pipelined systems for nonvolatile logic applications have been proposed and designed with enhancing performances of the nonvolatile integrated logic circuits by the multi-functionality based on the nonvolatile memories such as ferroelectric and ferromagnetic devices. As examples of the nonvolatile logic applications, sum of absolute differences (SAD) circuits for motion-vector estimation in video data encoding and content-addressable memories (CAMs) for highly-parallel information retrieval have demonstrated with their high-speed and low-power consumptions based on the fine-grained pipelining and power gating techniques.

Report

(4 results)
  • 2013 Annual Research Report   Final Research Report ( PDF )
  • 2012 Research-status Report
  • 2011 Research-status Report
  • Research Products

    (26 results)

All 2014 2013 2012

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (19 results) Patent(Industrial Property Rights) (5 results) (of which Overseas: 2 results)

  • [Journal Article] High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, and Takahiro Hanyu
    • Journal Title

      IEEE Transactions on Circuits and Systems I

      Volume: vol.61 Issue: 3 Pages: 865-876

    • DOI

      10.1109/tcsi.2013.2283997

    • Related Report
      2013 Annual Research Report 2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] High-throughput CAM based on a synchronous overlapped search scheme2013

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, and Takahiro Hanyu
    • Journal Title

      IEICE Electronics Express

      Volume: 10 Issue: 7 Pages: 20130148-20130148

    • DOI

      10.1587/elex.10.20130148

    • NAID

      130003365008

    • ISSN
      1349-2543
    • Related Report
      2013 Annual Research Report 2013 Final Research Report
    • Peer Reviewed
  • [Presentation] Design of a Soft-Error Tolerant 9-Transistor/6-Magnetic-Tunnel-Junction Hybrid Cell Based Nonvolatile TCAM2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      IEEE International NEWCAS Conference
    • Place of Presentation
      カナダ
    • Year and Date
      2014-06-24
    • Related Report
      2013 Final Research Report
  • [Presentation] Soft-Delay-Error Evaluation in Content-Addressable Memory2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi, and Takahiro Hanyu
    • Organizer
      IEEE International Symposium on Multiple-Valued Logic
    • Place of Presentation
      ドイツ
    • Year and Date
      2014-05-21
    • Related Report
      2013 Final Research Report
  • [Presentation] A Compact Soft-Error Tolerant Asynchronous TCAM Based on a Transistor/Magnetic-Tunnel-Junction Hybrid Dual-Rail Word Structure2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      IEEE International Symposium on Asynchronous Circuits and Systems
    • Place of Presentation
      ドイツ
    • Year and Date
      2014-05-12
    • Related Report
      2013 Final Research Report
  • [Presentation] ばらつき耐性を有するコンパクト・低電力不揮発TCAM の構成2014

    • Author(s)
      松永翔雲, 望月明, 羽生貴弘
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      新潟
    • Year and Date
      2014-03-20
    • Related Report
      2013 Final Research Report
  • [Presentation] ばらつき耐性を有するコンパクト・低電力不揮発TCAMの構成2014

    • Author(s)
      松永翔雲, 望月明, 羽生貴弘
    • Organizer
      2014年 電子情報通信学会総合大会
    • Place of Presentation
      新潟, 日本
    • Related Report
      2013 Annual Research Report
  • [Presentation] A Compact Soft-Error Tolerant Asynchronous TCAM Based on a Transistor/Magnetic-Tunnel-Junction Hybrid Dual-Rail Word Structure2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      20th IEEE International Symposium on Asynchronous Circuits and Systems
    • Place of Presentation
      Potsdam, Germany
    • Related Report
      2013 Annual Research Report
  • [Presentation] Soft-Delay-Error Evaluation in Content-Addressable Memory2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi, and Takahiro Hanyu
    • Organizer
      IEEE 44th International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Bremen, Germany
    • Related Report
      2013 Annual Research Report
  • [Presentation] Design of a Soft-Error Tolerant 9-Transistor/6-Magnetic-Tunnel-Junction Hybrid Cell Based Nonvolatile TCAM2014

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      12th IEEE International NEWCAS Conference
    • Place of Presentation
      Trois-Rivieres, Canada
    • Related Report
      2013 Annual Research Report
  • [Presentation] Probabilistic Search Schemes for High-Speed Low-Power Content-Addressable Memories2013

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, and Takahiro Hanyu
    • Organizer
      International Conference on Analog VLSI Circuits
    • Place of Presentation
      カナダ
    • Year and Date
      2013-10-18
    • Related Report
      2013 Final Research Report
  • [Presentation] Design of a No-Standby Energy Pipelined LSI Processor Using MTJ-Based Nonvolatile Logic-in-Memory Architecture2013

    • Author(s)
      Magdalena Sihotang, Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Hideo Sato, Syunsuke Fukami, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu
    • Organizer
      IEEE International Solid-State Circuits Conference (Student Research Preview)
    • Place of Presentation
      アメリカ
    • Year and Date
      2013-02-17
    • Related Report
      2013 Final Research Report
  • [Presentation] Probabilistic Search Schemes for High-Speed Low-Power Content-Addressable Memories2013

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, Warren J. Gross, and Takahiro Hanyu
    • Organizer
      International Conference on Analog VLSI Circuits
    • Place of Presentation
      Montreal, Canada
    • Related Report
      2013 Annual Research Report
  • [Presentation] Design of a No-Standby Energy Pipelined LSI Processor Using MTJ-Based Nonvolatile Logic-in-Memory Architecture2013

    • Author(s)
      Magdalena Sihotang, Shoun Matsunaga, ・・・ , and Takahiro Hanyu (全17名)
    • Organizer
      IEEE International Solid-State Circuits Conference (Student Research Preview)
    • Place of Presentation
      アメリカ(サンフランシスコ)
    • Related Report
      2012 Research-status Report
  • [Presentation] Fine-Grained Power-Gating Scheme of a Nonvolatile Logic-in-Memory Circuit for Low-Power Motion-Vector Extraction2012

    • Author(s)
      Magdalena Sihotang, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      IEEE NEWCAS Conference
    • Place of Presentation
      カナダ
    • Year and Date
      2012-06-20
    • Related Report
      2013 Final Research Report
  • [Presentation] High-Throughput Low-Energy Content-Addressable Memory Based on Self-Timed Overlapped Search Mechanism2012

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, and Takahiro Hanyu
    • Organizer
      IEEE International Symposium on Asynchronous Circuits and Systems
    • Place of Presentation
      デンマーク
    • Year and Date
      2012-05-07
    • Related Report
      2013 Final Research Report
  • [Presentation] 不揮発論理ゲートに基づく細粒度パイプライン回路の構成2012

    • Author(s)
      松永 翔雲,羽生 貴弘
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      岡山
    • Year and Date
      2012-03-20
    • Related Report
      2013 Final Research Report 2011 Research-status Report
  • [Presentation] MTJ/MOS ハイブリッド構造に基づく待機電力フリー不揮発SAD回路の構成と評価2012

    • Author(s)
      マグダレナ シホタン,松永 翔雲,羽生 貴弘
    • Organizer
      多値論理とその応用研究会
    • Place of Presentation
      宮崎
    • Year and Date
      2012-01-08
    • Related Report
      2013 Final Research Report
  • [Presentation] High-Throughput Low-Energy Content-Addressable Memory Based on Self-Timed Overlapped Search Mechanism2012

    • Author(s)
      Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet, and Takahiro Hanyu
    • Organizer
      IEEE International Symposium on Asynchronous Circuits and Systems
    • Place of Presentation
      デンマーク(リュンビュー)
    • Related Report
      2012 Research-status Report
  • [Presentation] Fine-Grained Power-Gating Scheme of a Nonvolatile Logic-in-Memory Circuit for Low-Power Motion-Vector Extraction2012

    • Author(s)
      Magdalena Sihotang, Shoun Matsunaga, and Takahiro Hanyu
    • Organizer
      IEEE NEWCAS Conference
    • Place of Presentation
      カナダ(モントリオール)
    • Related Report
      2012 Research-status Report
  • [Presentation] MTJ/MOSハイブリッド構造に基づく待機電力フリー不揮発SAD回路の構成と評価2012

    • Author(s)
      マグダレナ シホタン,松永 翔雲,羽生 貴弘
    • Organizer
      多値論理とその応用研究会
    • Place of Presentation
      宮崎
    • Related Report
      2011 Research-status Report
  • [Patent(Industrial Property Rights)] 不揮発性連想メモリセル2014

    • Inventor(s)
      羽生貴弘, 松永翔雲, 望月明, 遠藤哲郎, 大野英男
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2014-062766
    • Filing Date
      2014-03-25
    • Related Report
      2013 Annual Research Report 2013 Final Research Report
  • [Patent(Industrial Property Rights)] 半導体記憶装置及びその駆動方法2013

    • Inventor(s)
      羽生貴弘, 松永翔雲, 鬼沢直哉, ヴィ. ガウデット
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2013-05-03
    • Related Report
      2013 Final Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体記憶装置及びその駆動方法2013

    • Inventor(s)
      羽生貴弘, 松永翔雲, 鬼沢直哉, ヴィ. ガウデット
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2013-05-03
    • Related Report
      2013 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体記憶装置及びその駆動方法2012

    • Inventor(s)
      羽生貴弘, 松永翔雲, 鬼沢直哉, ヴィ. ガウデット
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2012-105558
    • Filing Date
      2012-05-06
    • Related Report
      2013 Final Research Report
  • [Patent(Industrial Property Rights)] 半導体記憶装置及びその駆動方法2012

    • Inventor(s)
      羽生貴弘,松永翔雲,鬼沢直哉,ヴィ.ガウデット
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2012-105558
    • Filing Date
      2012-05-06
    • Related Report
      2012 Research-status Report

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Published: 2011-08-05   Modified: 2019-07-29  

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