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Design of a nonvolatile FPGA with system self-recovery function

Research Project

Project/Area Number 25870067
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system
Electron device/Electronic equipment
Research InstitutionTohoku University

Principal Investigator

Suzuki Daisuke  東北大学, 学際科学フロンティア研究所, 助教 (00574675)

Project Period (FY) 2013-04-01 – 2016-03-31
Project Status Completed (Fiscal Year 2015)
Budget Amount *help
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2014: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2013: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
KeywordsFPGA / 不揮発ロジック / MTJ素子 / 低消費電力 / ロジックインメモリ / 耐災害性 / 高信頼 / 計算機アーキテクチャ / ロジックインメモリ回路 / VLSI / スピントロニクス
Outline of Final Research Achievements

The mission of the research is to realize a nonvolatile field-programmable gate array (FPGA) with robustness against power failure due to natural disaster. To perform the mission, we have designed energy-efficient nonvolatile FPGA circuit IPs by using magnetic tunnel junction (MTJ) devices. We have also realized a self-terminated mechanism which makes it possible to realize successful write in the MTJ device. By embedding these circuit IPs into an open-source CAD tool Verilog-to-Routing (VTR), we have realized the nonvolatile FPGA with self-recovery function and established its design environment.

Report

(4 results)
  • 2015 Annual Research Report   Final Research Report ( PDF )
  • 2014 Research-status Report
  • 2013 Research-status Report
  • Research Products

    (19 results)

All 2016 2015 2014 2013 Other

All Journal Article (3 results) (of which Peer Reviewed: 3 results,  Acknowledgement Compliant: 3 results,  Open Access: 2 results) Presentation (10 results) (of which Int'l Joint Research: 2 results) Remarks (5 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Magnetic-tunnel-junction based low-energy nonvolatile flip-flop using an area-efficient self-terminated write driver2015

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Journal Title

      Journal of Applied Physics

      Volume: 117 Issue: 17

    • DOI

      10.1063/1.4906760

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] Nonvolatile Field-Programmable Gate Array Using 2-Transistor-1-Magnetic-Tunnel-Junction-Vell-Based Multi-Context Array for Power and Area Efficient Dynamically Reconfigurable Logic2015

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 54 Issue: 4S Pages: 04DE01-04DE01

    • DOI

      10.7567/jjap.54.04de01

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] Cost-Efficient Self-Terminated Write Driver for Spin-Transfer-Torque RAM and Logic2014

    • Author(s)
      Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
    • Journal Title

      IEEE Transactions on Magnetics

      Volume: 50 Issue: 11 Pages: 3402104-3402104

    • DOI

      10.1109/tmag.2014.2322387

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme2016

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Organizer
      2016 IEEE International Symposium on Multiple-Valued Logic
    • Place of Presentation
      北海道大学
    • Year and Date
      2016-05-18
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Self-Terminated 機構に基づくMTJ 書込み回路とその乱数生 成器への応用2016

    • Author(s)
      鈴木大輔,羽生貴弘
    • Organizer
      電子情報通信学会2016総合大会
    • Place of Presentation
      九州大学伊都キャンパス
    • Year and Date
      2016-03-15
    • Related Report
      2015 Annual Research Report
  • [Presentation] Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure2015

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Organizer
      2015 IEEE 58th International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Fort Collins, Colorado USA
    • Year and Date
      2015-08-02
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] ロジックインメモリベース不揮発FPGA用電源制御モジュールの設計2015

    • Author(s)
      鈴木 大輔,田畑祐樹, 羽生 貴弘
    • Organizer
      2015年電子情報通信学会総合大会
    • Place of Presentation
      立命館大学びわこ・くさつキャンパス (滋賀県草津市)
    • Year and Date
      2015-03-10 – 2015-03-13
    • Related Report
      2014 Research-status Report
  • [Presentation] MTJ-Based Low-Energy Nonvolatile Flip-Flop Using Area-Efficient Self-Terminated Write Driver2014

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Organizer
      59th Annual Conference on Magnetism and Magnetic Materials
    • Place of Presentation
      Hawaii (America)
    • Year and Date
      2014-11-03 – 2014-11-08
    • Related Report
      2014 Research-status Report
  • [Presentation] A Nonvolatile FPGA Using MTJ-Based Logic-in-Memory Structure for Ultra Low-Power Reconfigurable Systems2014

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Organizer
      International Workshop on Electronics and Communications
    • Place of Presentation
      Chengdu (China)
    • Year and Date
      2014-10-27 – 2014-10-28
    • Related Report
      2014 Research-status Report
  • [Presentation] Nonvolatile FPGA Using 2T-1MTJ-Cell-Based Multi-Context Array for Power and Area Efficient Dynamically Reconfigurable Logic2014

    • Author(s)
      Daisuke Suzuki and Takahiro Hanyu
    • Organizer
      International Conference on Solid State Devices and Material
    • Place of Presentation
      つくば国際会議場 (茨城県つくば市)
    • Year and Date
      2014-09-08 – 2014-09-11
    • Related Report
      2014 Research-status Report
  • [Presentation] Optimally Self-Terminated Compact Switching Circuit Using Continuous Voltage Monitoring Achieving High Read Margin for STT MRAM and Logic2014

    • Author(s)
      Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
    • Organizer
      IEEE International Magnetic Conference
    • Place of Presentation
      Dresden (Germany)
    • Year and Date
      2014-05-04 – 2014-05-08
    • Related Report
      2014 Research-status Report
  • [Presentation] Optimally Self-Terminated Compact Switching Circuit Using Continuous Voltage Monitoring Achieving High Read Margin for STT MRAM and Logic2014

    • Author(s)
      Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
    • Organizer
      IEEE Intermag 2014
    • Place of Presentation
      Dresden, Germany
    • Related Report
      2013 Research-status Report
  • [Presentation] MTJ素子を用いた不揮発FPGAの電力効率最適化手法2013

    • Author(s)
      鈴木大輔,夏井雅典,望月明,羽生貴弘
    • Organizer
      デザインガイア2013 -VLSI設計の新しい大地-
    • Place of Presentation
      鹿児島県鹿児島市
    • Related Report
      2013 Research-status Report
  • [Remarks] 東北大学電気通信研究所 羽生・夏井研究室

    • URL

      http://www.ngc.riec.tohoku.ac.jp/index.html

    • Related Report
      2014 Research-status Report
  • [Remarks] 東北大学 国際集積エレクトロニクス研究開発センター

    • URL

      http://www.cies.tohoku.ac.jp/index.html

    • Related Report
      2014 Research-status Report
  • [Remarks] 東北大学 省エネルギー・スピントロニクス集積化システムセンター

    • URL

      http://www.csis.tohoku.ac.jp/index.html

    • Related Report
      2014 Research-status Report
  • [Remarks] 羽生研究室WEBページ

    • URL

      http://www.ngc.riec.tohoku.ac.jp/

    • Related Report
      2013 Research-status Report
  • [Remarks] researchmap

    • URL

      http://researchmap.jp/DSK0213/

    • Related Report
      2013 Research-status Report
  • [Patent(Industrial Property Rights)] 抵抗変化型記憶素子へのデータ書き込み装置2014

    • Inventor(s)
      羽生貴弘,鈴木大輔,夏井雅典,望月明
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2014-060901
    • Filing Date
      2014-03-24
    • Related Report
      2013 Research-status Report

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Published: 2014-07-25   Modified: 2019-07-29  

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