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[文献書誌] 坪内和夫: "パーソナル通信とネットワーク-ハイテク・パーソナル通信技術の研究開発の動向" 電子情報通信学会 基礎・境界ソサイエティ大会. PA-3-6. 362-363 (1996)
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[文献書誌] 鎌田武遠: "チャネル間干渉のない近似同期CDMA用符号-SAWコンボルバを用いた回路構成法の検討" 電子情報通信学会技術研究報告(スペクトラム拡散研究会). SST96-51. 13-18 (1996)
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[文献書誌] T. Suetsugu: "AIN Epitaxial Growth on Atomically Flat Initially Nitrided α-Al203 Wafer" 2nd International Symposium on Control of Semiconductor Interfaces. B2-4. (1996)
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[文献書誌] T. Matsuoka: "Hot-Carrier-Induced Degradation of N2O-Oxynitrided Gate Oxide NMOSFETs" IEEE Trans. on Electron Devices. 43. 1364-1373 (1996)
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[文献書誌] H. K. Jung: "Impact Ionization Model for Full Band Monte Carlo Simulation in GaAs" Journal of Applied Physics. 79. 2473-2480 (1996)
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[文献書誌] H. Yamamoto: "High-sensitivity SOI MOS Photodetector with Self-Amplification" Japanese Journal of Applied Physics. 35. 1382-1386 (1996)
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[文献書誌] T. Kunikiyo: "A model of impact-ionization due to primary hole in silicon for a full band Monte Carlo simulation" Journal of Applied Physics. 79-5. 7718-7725 (1996)
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[文献書誌] K. Sonoda: "Moment expansion approach to calculate impact ionization rate in submicron silicon devices" Journal of Applied Physics. 80. 5444-5448 (1996)
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[文献書誌] T. Shibata: "Implementing Intellingence in Silicon Integrated Circuits Using Neuron-Like High-Functionality Transistors" Journal of Robotics and Mechatronics. 8-6. 508-515 (1996)
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[文献書誌] K. Kotani: "DC-Current-Free Low-Power A/D Converter Circuitry Using Dynamic Latch Comparators with Divided-Capacitance Voltage Reference Divided-Capacitance Voltage Reference" IEEE International Symposium on Circuits and Systems. 4. 205-208 (1996)
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[文献書誌] M. Konda: "Neuron-MOS Correlator Based on Manhattan Distance Computation for Event Recognition Hardware" IEEE International Symposium on Circuits and Systems. 4. 217-220 (1996)
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[文献書誌] Y. Yamashita: "Write/Verify Free Analog Non-Volatile Memory Using a Neuron-MOS Comparator" IEEE International Symposium on Circuits and Systems. 4. 229-232 (1996)
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[文献書誌] T. Ohmi: "Four-Terminal Device Concept for Intelligent Soft Computing on Silicon Integrated Circuits Intagrated Circuits" Proceedings of the 4th International Conference on Soft Computing(IIZUKA '96). 1. 49-58 (1996)
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[文献書誌] J. Maeda: "High-Rate GaAs Epitaxial Lift-Off Technique for Optoelectronic Integrated Circuits" Extended Abstracts of the 1996 Int. Conf. on Solid State Devices and Materials. 643-645 (1996)
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[文献書誌] J. Maeda: "High-Rate GaAs Epitaxial Lift-Off Technique for Optoelectronic Integrated Circuits" Japanese Journal of Applied Physics. 36-3. 629-635 (1997)