2006 Fiscal Year Final Research Report Summary
Development of novel high speed transistor utilizing inter and intra band tunneling of carrier by GaAs molecular layer
| Project/Area Number |
16360014
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Semiconductor Research Institute |
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Principal Investigator |
KURABAYASHI Toru Semiconductor Research Institute, 半導体研究所, 主任研究員 (90195537)
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| Co-Investigator(Kenkyū-buntansha) |
NISHIZAWA Junichi Semiconductor Research Institute, 半導体研究所, 名誉所長 (20006208)
PLOTKA Piotr Semiconductor Research Institute, 半導体研究所, 主任研究員 (70270501)
HENMI Masahiro Semiconductor Research Institute, 半導体研究所, 研究補助員
HAMANO Tomoyuki Semiconductor Research Institute, 半導体研究所, 実験補助員
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| Project Period (FY) |
2004 – 2006
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| Keywords | low temperature growth / tunnel junction / ultra high speed device / static induction transistor / intra-band tunneling / inter-band tunneling / intra-band tunneling |
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| Research Abstract |
As a basic technology to fabricate tunneling static induction transistor, GaAs molecular layer epitaxy has been developed. This method enables to grow ultra-thin layer of doped GaAs at the temperature of 265℃. A modulation doped method has been applied to fabricate heavily doped p+ and n+ layers, which are required to construct tunnel-junction. Some structures of p++(100nm)-n++(10nm)-i(100nm)-n+(substrate) have been fabricated and demonstrated as oscillating diodes, TUNNETT (Tunnelling Transit Time Diode). This TUNNETT operates by tunneling electron with transit time effect of the carrier. We achieved up to 708 GHz with fundamental-mode room temperature operation. This is a highest frequency of fundamental-mode oscillation in the electron device oscillators. This technology have been applied for tunneling transisitor, a intra-band tunneling transistor based on n+-p+-n+ source-drain structure, and a-inter-band tunneling transistor based on p+-n+ source-drain structure. The gate structure of these transistors, AlGaAs/GaAs MIS gate is also fabricated by low temperature molecular layer epitaxy. Some transistors are operated and analyzed, especially tunneling component of total current.
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