2009 Fiscal Year Final Research Report
Development of a sensor-node processor with four order of magnitude variable power dissipation
| Project/Area Number |
19680002
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| Research Category |
Grant-in-Aid for Young Scientists (A)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | Osaka University |
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Principal Investigator |
HASHIMOTO Masanori Osaka University, 大学院・情報科学研究科, 准教授 (80335207)
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| Project Period (FY) |
2007 – 2009
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| Keywords | ハードウェア設計 / センサネットワーク |
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| Research Abstract |
This project developed a processor that realizes "ultra-low power operation" demanded to sensor nodes composing sensor networks. Also, device modeling and circuit techniques needed to implement the processor was developed. Evaluating the processor on a test chip fabricated in 65nm process, the processor archived 4.18pJ/cycle at 0.5V in a normal synchronized operation mode, and the energy dissipation was further reduced by introducing an asynchronous operation.
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