Highly parallel instruction set extensions for motion estimation

2016 Fiscal Year Final Research Report

• Project/Area Number: 24500059
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: Mie University
• Principal Investigator: Kondo Toshio 三重大学, 工学研究科, 教授 (60324539)
• Project Period (FY): 2012-04-01 – 2017-03-31
• Keywords: 動き検出 / SIMD / ブロッキング / インター予測 / H.265 / キャッシュメモリ / スーパースカラ / 行列計算

Outline of Final Research Achievements

We showed a super scalar data path structure containing an SIMD processor corresponding to efficient small area motion estimation, a tile/line accessible cache memory structure reducing memory bottleneck in two dimensional data access and their instruction extensions for high speed processing of motion picture compression increasing computing complexity year by year. In the process of structure investigation based on acceleration of H.265 reference software, we proposed a new motion estimation algorithm utilizing efficient small area search capability and a decision method of inter prediction mode necessity utilizing intensity dispersion of pixels in each candidate prediction unit PU and reducing total coding time by half. In addition, we showed that the tile/line accessible cache for efficient motion estimation could reduce number of access misses by over one order of magnitude in the large scale matrix calculation.

Free Research Field

コンピュータアーキテクチャ