A Very High Resolution Hardware Trigger for the ATLAS Muon System

2015 Fiscal Year Final Research Report

• Project/Area Number: 24540299
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Particle/Nuclear/Cosmic ray/Astro physics
• Research Institution: The University of Tokyo
• Principal Investigator: Sakamoto Hiroshi 東京大学, 素粒子物理国際研究センター, 教授 (80178574)
• Co-Investigator(Kenkyū-buntansha): KAWAMOTO Tatsuo 東京大学, 素粒子物理国際研究センター, 准教授 (80153021)
• Project Period (FY): 2012-04-01 – 2016-03-31
• Keywords: 陽子陽子衝突実験 / トリガーシステム / FPGA / 高速シリアル通信 / ミューオン検出器 / シミュレーション

Outline of Final Research Achievements

Performance improvement is necessary for the high luminosity upgrade of the ATLAS experiment of the Large Hadron Collider at Geneva. Signals from existing Thin Gap Chamber is not enough to keep sufficient position resolution. So by applying signals from Monitored Drift Tubes to the hardware trigger, the necessary resolution can be achieved. This has been confirmed by a simulation work based on a study using real experimental data. A general purpose FPGA module PT7 was developed, which is used to construct a prototype trigger system.

Free Research Field

素粒子物理学実験