Design of a nonvolatile FPGA with system self-recovery function

2015 Fiscal Year Final Research Report

• Project/Area Number: 25870067
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Computer system; Electron device/Electronic equipment
• Research Institution: Tohoku University
• Principal Investigator: Suzuki Daisuke 東北大学, 学際科学フロンティア研究所, 助教 (00574675)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Keywords: FPGA / 不揮発ロジック / MTJ素子 / 低消費電力 / ロジックインメモリ / 耐災害性

Outline of Final Research Achievements

The mission of the research is to realize a nonvolatile field-programmable gate array (FPGA) with robustness against power failure due to natural disaster. To perform the mission, we have designed energy-efficient nonvolatile FPGA circuit IPs by using magnetic tunnel junction (MTJ) devices. We have also realized a self-terminated mechanism which makes it possible to realize successful write in the MTJ device. By embedding these circuit IPs into an open-source CAD tool Verilog-to-Routing (VTR), we have realized the nonvolatile FPGA with self-recovery function and established its design environment.

Free Research Field

集積回路