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Nano MOSFET Fluctuations and Device Integrity

Research Project

Project/Area Number 18063006
Research Category

Grant-in-Aid for Scientific Research on Priority Areas

Allocation TypeSingle-year Grants
Review Section Science and Engineering
Research InstitutionThe University of Tokyo

Principal Investigator

HIRAMOTO Toshiro  The University of Tokyo, 生産技術研究所, 教授 (20192718)

Co-Investigator(Kenkyū-buntansha) 更屋 拓哉  東京大学, 生産技術研究所, 助手 (90334367)
Co-Investigator(Renkei-kenkyūsha) SARAYA Takuya  東京大学, 生産技術研究所, 助手 (90334367)
Project Period (FY) 2006 – 2009
Project Status Completed (Fiscal Year 2009)
Budget Amount *help
¥51,200,000 (Direct Cost: ¥51,200,000)
Fiscal Year 2009: ¥13,800,000 (Direct Cost: ¥13,800,000)
Fiscal Year 2008: ¥13,800,000 (Direct Cost: ¥13,800,000)
Fiscal Year 2007: ¥11,800,000 (Direct Cost: ¥11,800,000)
Fiscal Year 2006: ¥11,800,000 (Direct Cost: ¥11,800,000)
Keywords特性ばらつき / しきい値電圧 / SOI / SRAM / MOSFET / 半導体 / 不純物揺らぎ / 微細化 / VLSI / ランダムテレグラフノイズ / 正規分布 / 半導体超微細化 / 基板バイアス効果 / 低消費電力 / 不純物ゆらぎ
Research Abstract

Random variability has been studied by measurements and simulation. It has been clarified that SOI MOSFETs with very thin buried oxide is less sensitive to random dopant fluctuations. A new method of self-suppression of variability after chip fabrication has been proposed and its validity has been demonstrated by simulation.

Report

(5 results)
  • 2009 Annual Research Report   Final Research Report ( PDF )
  • 2008 Annual Research Report   Self-evaluation Report ( PDF )
  • 2006 Annual Research Report
  • Research Products

    (68 results)

All 2011 2010 2009 2008 2007 2006

All Journal Article (26 results) (of which Peer Reviewed: 16 results) Presentation (39 results) Book (1 results) Patent(Industrial Property Rights) (2 results)

  • [Journal Article] Threshold Voltage Dependence of Threshold Voltage Variability in Intrinsic Channel Silicon-on-Insulator2010

    • Author(s)
      C.Lee, A.T.Putra, K.Shimizu, T.Hiramoto
    • Journal Title

      No.4, Issue 2

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Threshold Voltage Dependense of Threshold Voltage Variability in Intrinsic Channel Silioon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors with Ultrathin Buried Oxide2010

    • Author(s)
      Chiho Lee
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 49

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Impact of Oxide Thickness Fluctuation and Local Gate Depletion on Threshold Voltage Variation in Metal-Oxide-Semiconductor Field-Effect-Transistors2009

    • Author(s)
      A.T.Putra, T.Tsunomura, A.Nishida, S.Kamohara, K.Takeuchi, T.Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics Vol.48, No.6

      Pages: 64504-64504

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] MOSトランジスタのスケーリングに伴う特性ばらつき2009

    • Author(s)
      平本俊郎, 竹内潔, 西田彰男
    • Journal Title

      電子情報通信学会会誌 Vol.92, No.6

      Pages: 416-426

    • NAID

      110007227367

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Consideration of Random Dopant Fluctuation Models for Accurate Prediction of Threshold Voltage Variation of Metal-Oxide-Semiconductor Field-Effect Transistors in 45nm Technology and Beyond2009

    • Author(s)
      A.T.Putra, A.Nishida, S.Kamohara, T.Tsunomura, T.Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics Vol.48, No.4

      Pages: 44502-44502

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Random Threshold Voltage Variability Induced by Gate-Edge Fluctuations in Nanoscale Metal-Oxide-Semiconductor Field-Effect Transistors2009

    • Author(s)
      A.T.Putra, A.Nishida, S.Kamohara, T.Hiramoto
    • Journal Title

      Applied Physics Express Vol.2, No.2

      Pages: 24501-24501

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Random Threshold Voltage Variability Induced by Gate Edge Fluctuations in Nanoscale Metal-Oxide- Semiconductor Field-Effect-Transistors2009

    • Author(s)
      A. T. Putra, A. Nishida, S. Kamohara, and T. Hiramoto
    • Journal Title

      Applied Physics Express Vol. 2, No. 2

      Pages: 24501-24501

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Random Threshold Voltage Variability Induced by Gate-Edge Fluctuations in Nanoscale Metal-Oxide-Semiconductor Field-Effect Transistors2009

    • Author(s)
      Arifin Tamsir Putra, Akio Nishida, Shim Kamohara, and Toshiro Hiramoto
    • Journal Title

      Applied Physics Express 2

      Pages: 24501-24501

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 増大する微細MOSトランジスタの特性ばらつき:現状と対策2008

    • Author(s)
      平本俊郎, 竹内潔, 西田彰男
    • Journal Title

      電気学会論文誌C Vol.128, No.6

      Pages: 820-824

    • NAID

      10021132489

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      T.Ohtou, T.Saraya, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices vol.54, no.1

      Pages: 40-46

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      T. Ohtou, T. Saraya, and T. Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices(Invited) vol. 54, no. 1

      Pages: 40-46

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      Tetsu Ohtou, Takuya Saraya, and Toshiro Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices 54

      Pages: 40-46

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Impact of Parameter Variations and Random Dopant Fluctuations on Short-Channel Fully Depleted SOI MOSFETs With Extremely Thin BOX2007

    • Author(s)
      T.Ohtou, N.Sugii, T.Hiramoto
    • Journal Title

      IEEE Electron Devices Letters Vol.28, No.8

      Pages: 740-742

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Device Design of Nanoscale MOSFETs Considering the Suppression of Short Channel Effects and Characteristics Variations2007

    • Author(s)
      T.Hiramoto, T.Nagumo, T.Ohtou, K.Yokoyama
    • Journal Title

      IEICE Transactions on Electronics Vol.E90-C, No.4

      Pages: 836-841

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Threshold-Voltage Control of AC Performance Degradation-Free FD SOI MOSFET With Extremely Thin BOX Using Variable Body-Factor Scheme2007

    • Author(s)
      T.Ohtou, K.Yokoyama, K.Shimizu, T.Nagumo, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol.54, No.2

      Pages: 301-307

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Impact of Parameter Variations and Random Dopant Fluctuations on Short-Channel Fully Depleted SOI MOSFETs With Extremely Thin BOX2007

    • Author(s)
      T. Ohtou, N. Sugii, and T. Hiramoto
    • Journal Title

      IEEE Electron Devices Letters Vol. 28, No. 8

      Pages: 740-742

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Device Design of Nanoscale MOSFETs Considering the Suppression of Short Channel Effects and Characteristics Variations2007

    • Author(s)
      T. Hiramoto, T. Nagumo, T. Ohtou, and K. Yokoyama
    • Journal Title

      IEICE Transactions on Electronics(Invited) Vol. E90-C, No. 4

      Pages: 836-841

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Threshold- Voltage Control of AC Performance Degradation-Free FD SOI MOSFET With Extremely Thin BOX Using Variable Body-Factor Scheme2007

    • Author(s)
      T. Ohtou, K. Yokoyama, K. Shimizu, T. Nagumo, and T. Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol. 54, No. 2

      Pages: 301-307

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Impact of Parameter Variations and Random Dopant Fluctuations on Short-Channel Fully Depleted SOI MOSFETs With Extremely Thin BOX2007

    • Author(s)
      Tetsu Ohtou, Nobuyuki Sugii, and Toshiro Hiramoto
    • Journal Title

      IEEE Electron Devices Letters 28

      Pages: 740-742

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Threshold-Voltage Control of AC Performance Degradation-Free FD SOI MOSFET With Extremely Thin BOX Using Variable Body-Factor Scheme2007

    • Author(s)
      T.Ohtou, K.Yokoyama, K.Shimizu, T.Nagumo, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol. 54, No. 2

      Pages: 301-307

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Design Guideline of Multi-Gate MOSFETs With Substrate-Bias Control2006

    • Author(s)
      T.Nagumo, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol.53, No.12

      Pages: 3025-3031

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Modeling of Body Factor and Subthreshold Swing in Bulk Metal Oxide Semiconductor Field Effect Transistors in Short-Channel Regime2006

    • Author(s)
      A.T.Putra, M.Saitoh, G.Tsutsui, T.Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics Vol.45, No.8A

      Pages: 6173-6176

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Design Guideline of Multi-Gate MOSFETs with Substrate-Bias Control2006

    • Author(s)
      T. Nagumo and T. Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol. 53, No. 12

      Pages: 3025-3031

    • Related Report
      2008 Self-evaluation Report
  • [Journal Article] Modeling of Body Factor and Subthreshold Swing in Bulk Metal Oxide Semiconductor Field Effect Transistors in Short-Channel Regime2006

    • Author(s)
      A.T.Putra, M.Saitoh, G.Tsutsui, T.Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 8A

      Pages: 6173-6176

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Mobility and Threshold-Voltage Comparison Between (110)-and (100)-Oriented Ultrathin-Body Silicon MOSFETs2006

    • Author(s)
      G.Tsutsui, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol. 53, No. 10

      Pages: 2582-2588

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Design Guideline of Multi-Gate MOSFETs With Substrate-Bias Control2006

    • Author(s)
      T.Nagumo, Toshiro Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices Vol. 53, No. 12

      Pages: 3025-3031

    • Related Report
      2006 Annual Research Report
  • [Presentation] 完全欠乏型SOI MOSFETにおけるDIBLおよび"電流立上がり電圧"ばらつきの抑制2011

    • Author(s)
      水谷朋子
    • Organizer
      2011年春季第58回応用物理学学術講演会
    • Place of Presentation
      神奈川工科大学
    • Year and Date
      2011-03-26
    • Related Report
      2009 Annual Research Report
  • [Presentation] 完全欠乏型SOI MOSFETにおけるランダムテレグラフノイズの抑制2011

    • Author(s)
      西村淳
    • Organizer
      2011年春季第58回応用物理学学術講演会
    • Place of Presentation
      神奈川工科大学
    • Year and Date
      2011-03-26
    • Related Report
      2009 Annual Research Report
  • [Presentation] Statistical Comparison of Random Telegraph Noise (RTN) in Bulk and Fully Depleted SOI MOSFETs2011

    • Author(s)
      J.Nishimura, T.Saraya, T.Hiramoto
    • Organizer
      Ultimate Integration of Silicon (ULIS)
    • Place of Presentation
      Cork, Ireland
    • Year and Date
      2011-03-16
    • Related Report
      2009 Final Research Report
  • [Presentation] Statistical Comparision of Random Telegraph Noise(RTN) in Bulk and Fully Depleted SOI MOSFETs2011

    • Author(s)
      Jun Nishimura
    • Organizer
      Ultimate Integration of Silicon (ULIS)
    • Place of Presentation
      アイルランド・コーク
    • Year and Date
      2011-03-16
    • Related Report
      2009 Annual Research Report
  • [Presentation] Suppression of DIBL and Current-Onset Voltage Variability in Intrinsic Channnel Fully Depleted SOI MOSFETs2010

    • Author(s)
      T.Hiramoto
    • Organizer
      IEEE International SOI Conference
    • Place of Presentation
      米国・サンディエゴ
    • Year and Date
      2010-10-14
    • Related Report
      2009 Annual Research Report
  • [Presentation] Measurements and characterization of statistical variability2010

    • Author(s)
      T.Hiramoto
    • Organizer
      Workshop on Simulation and Characterization of Statistical CMOS Variability and Reliability, The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
    • Place of Presentation
      Royal Hotel Carlton, Bologna, Italy
    • Year and Date
      2010-09-09
    • Related Report
      2009 Final Research Report
  • [Presentation] Effect of Back Bias on Variability in Intrinsic Channel SOI MOSFETs2010

    • Author(s)
      T.Hiramoto, T.Saraya, C.Lee
    • Organizer
      International Symposium on Technology Evolution for Silicon Nano-Electronics (ISTESNE)
    • Place of Presentation
      Tokyo Institute of Technology
    • Year and Date
      2010-06-03
    • Related Report
      2009 Final Research Report
  • [Presentation] SRAMにおける読み/書き込みマージン一括自己修復手法2010

    • Author(s)
      鈴木誠
    • Organizer
      2010年春季第57回応用物理学学術講演会
    • Place of Presentation
      東海大学湘南キャンパス
    • Year and Date
      2010-03-17
    • Related Report
      2009 Annual Research Report
  • [Presentation] Simultaneously improvement of Write and Static Noise Margins in SRAM by Post-Fabrication Self-Convergence Technique2010

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      Workshop "The Fruits of Variability Research in Europe", Design, Automation & Test in Europe (DATE)
    • Place of Presentation
      International Congress Centre in Dresden, Dresden, Germany
    • Year and Date
      2010-03-12
    • Related Report
      2009 Final Research Report
  • [Presentation] Variability research : accomplishments and future directions-a Japanese perspective2010

    • Author(s)
      T.Hiramoto
    • Organizer
      Workshop "The Fruits of Variability Research in Europe", Design, Automation & Test in Europe (DATE)
    • Place of Presentation
      International Congress Centre in Dresden, Dresden, Germany
    • Year and Date
      2010-03-12
    • Related Report
      2009 Final Research Report
  • [Presentation] Simultaneously improvement of Write and Static Noise Margins in SRAM by Post-Fabrication Self-Convergence2010

    • Author(s)
      Makoto Suzuki
    • Organizer
      Workshop "The Fruits of Variability Research in Europe" Design、Automation & Test in Europe(DATE)
    • Place of Presentation
      ドイツ・ドレスデン
    • Year and Date
      2010-03-12
    • Related Report
      2009 Annual Research Report
  • [Presentation] Improvement of Static Noise Margin in SRAM by Post-Fabrication Self-Convergence Technique2009

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      International Semiconductor Device Research Symposium (ISDRS), TP7-03
    • Place of Presentation
      University of Maryland, MD, USA
    • Year and Date
      2009-12-10
    • Related Report
      2009 Final Research Report
  • [Presentation] Improvement of Static Noise Margin SRAM by Post-Fabrication Self-Convergence Technique2009

    • Author(s)
      Makoto Suzuki
    • Organizer
      International Semiconductor Deveice Research Symposium (ISDRS)
    • Place of Presentation
      米国・メリーランド大学
    • Year and Date
      2009-12-10
    • Related Report
      2009 Annual Research Report
  • [Presentation] Anomalous Back-Bias Dependence of Threshold Voltage Variability in NMOSFETs Due to High Concentration Regions near Source and Drain2009

    • Author(s)
      I.Yamato, T.Mama, T.Tsunomura, A.Nishida, T.Hiramoto
    • Organizer
      International Semiconductor Device Research Symposium (ISDRS), WP5-04
    • Place of Presentation
      University of Maryland, MD, USA
    • Year and Date
      2009-12-09
    • Related Report
      2009 Final Research Report
  • [Presentation] Vth Dependence of Vth Variability in Intrinsic Channel SOI MOSFETs with Ultra-Thin BOX2009

    • Author(s)
      C.Lee, A.T.Putra, K.Shimizu, T.Hiramoto
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Sendai
    • Year and Date
      2009-10-07
    • Related Report
      2009 Final Research Report
  • [Presentation] ロジックトランジスタにおける特性ばらつき一括自己修復手法2009

    • Author(s)
      鈴木誠
    • Organizer
      第70回応用物理学会学術講演会
    • Place of Presentation
      富山大学
    • Year and Date
      2009-09-08
    • Related Report
      2009 Annual Research Report
  • [Presentation] SRAMにおける特性ばらつき一括自己修復手法2009

    • Author(s)
      鈴木誠
    • Organizer
      第70回応用物理学会学術講演会
    • Place of Presentation
      富山大学
    • Year and Date
      2009-09-08
    • Related Report
      2009 Annual Research Report
  • [Presentation] SRAMおよびロジックトランジスタにおける特性ばらつき一括自己修復手法2009

    • Author(s)
      鈴木誠
    • Organizer
      応用物理学会シリコンテクノロジー分科会研究集会
    • Place of Presentation
      東京大学
    • Year and Date
      2009-07-21
    • Related Report
      2009 Annual Research Report
  • [Presentation] Post-Fabrication Self-Convergence Scheme for Suppressing Variability in SRAM Cells and Logic Transistors2009

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      Symposium on VLSI Technology, pp.148-149
    • Place of Presentation
      Kyoto
    • Year and Date
      2009-06-16
    • Related Report
      2009 Final Research Report
  • [Presentation] A New Methodology for Evaluating VT Variability Considering Dopant Depth Profile2009

    • Author(s)
      A.T.Putra, T.Tsunomura, A.Nishida, S.Kamohara, K.Takeuchi, S.Inaba, K.Terada, T.Hiramoto
    • Organizer
      Symposium on VLSI Technology, pp.116-117
    • Place of Presentation
      Kyoto
    • Year and Date
      2009-06-16
    • Related Report
      2009 Final Research Report
  • [Presentation] Post-Fabrication Self-Convergence Scheme for Suppressing Variability in SRAM Cells and Logic Transistors2009

    • Author(s)
      Makoto Suzuki
    • Organizer
      Symposium on VLSI Technology
    • Place of Presentation
      京都
    • Year and Date
      2009-06-16
    • Related Report
      2009 Annual Research Report
  • [Presentation] Impact of Lateral Dopant Profile on Threshold Voltage Variability in Scaled MOSFETs2009

    • Author(s)
      I.Yamato, A.T.Putra, T.Hiramoto
    • Organizer
      Silicon Nanoelectronics Workshop, pp.35-36
    • Place of Presentation
      Kyoto
    • Year and Date
      2009-06-13
    • Related Report
      2009 Final Research Report
  • [Presentation] Characterization of CMOS Variability Utilizing 1M-DMA and Takeuchi Plot2008

    • Author(s)
      T.Hiramoto
    • Organizer
      Workshop on Test Structure Design for Variability Characterization
    • Place of Presentation
      DoulbleTree Hotel, San Jose, CA, USA
    • Year and Date
      2008-11-13
    • Related Report
      2009 Final Research Report
  • [Presentation] Measuring and Understanding Device Variability2008

    • Author(s)
      T.Hiramoto
    • Organizer
      ESSDER/ ESSIRC Variability Workshop
    • Place of Presentation
      Edinburgh International Conference Centre, Edinburgh, UK
    • Year and Date
      2008-09-19
    • Related Report
      2009 Final Research Report
  • [Presentation] Impact of Fixed Charge at MOSFETs' SiO2/Si Interface on Vth Variation2008

    • Author(s)
      A.T.Putra, T.Tsunomura, A.Nishida, S.Kamohara, K.Takeuchi, T.Hiramoto
    • Organizer
      International Conference on Simulation of Semiconductor Devices and Processes (SISPAD)
    • Place of Presentation
      Hakone Prince Hotel, Kanagawa, Japan
    • Year and Date
      2008-09-09
    • Related Report
      2009 Final Research Report
  • [Presentation] Mobility and Variability in Silicon Nanowire MOSFETs2008

    • Author(s)
      T.Hiramoto, M.Kobayashi, J.Chen
    • Organizer
      14th International Symposium on the Physics of Semiconductors and Applications (ISPSA-2008), p.192
    • Place of Presentation
      Korea, Ramada Plaza Jeju Hotel, Jeju
    • Year and Date
      2008-08-27
    • Related Report
      2009 Final Research Report
  • [Presentation] Impact of Atomic Oxide Roughness and Local Gate Depletion on Vth Variation in MOSFETs2008

    • Author(s)
      A.T.Putra, T.Tsunomura, A.Nishida , S.Kamohara, K.Takeuchi, T.Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop, S1205
    • Place of Presentation
      Hilton Hawaiian Village, HI, USA
    • Year and Date
      2008-06-15
    • Related Report
      2009 Final Research Report
  • [Presentation] Impact of Fixed Charge at MOSFETs' SiO2/Si Interface on Vth Variation2008

    • Author(s)
      A.T. Putra, T. Tsunomura, A. Nishida, S. Kamohara, K. Takeuchi, and T. Hiramoto
    • Organizer
      International Conference on Simulation of Semiconductor Devices and Processes
    • Place of Presentation
      神奈川県箱根町
    • Year and Date
      2008-04-09
    • Related Report
      2008 Annual Research Report
  • [Presentation] FinFETs with Both Large Body Factor and High Drive-Current2007

    • Author(s)
      K.Takahashi, A.T.Putra, T.Hiramoto
    • Organizer
      International Semiconductor Device Research Symposium (ISDRS), WP9-01-11
    • Place of Presentation
      University of Maryland, MD, USA
    • Year and Date
      2007-12-12
    • Related Report
      2009 Final Research Report
  • [Presentation] Impact of Local Poly-Si Gate Depletion on Vth Variation in Nanoscale MOSFETs Investigated by 3D Device Simulation2007

    • Author(s)
      A.T.Putra, A.Nishida, S.Kamohara, T.Tsunomura, T.Hiramoto
    • Organizer
      International Semiconductor Device Research Symposium (ISDRS), WP8-03
    • Place of Presentation
      University of Maryland, MD, USA
    • Year and Date
      2007-12-12
    • Related Report
      2009 Final Research Report
  • [Presentation] Robust Design of Transistors : Present Status and Measures to Characteristic Variations2007

    • Author(s)
      T.Hiramoto
    • Organizer
      2007 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2007), pp.5-8
    • Place of Presentation
      Commodore Hotel Gyeongju Chosun, Korea
    • Year and Date
      2007-06-25
    • Related Report
      2009 Final Research Report
  • [Presentation] Body Factor and Leakage Current Reduction in Bulk FinFETs2007

    • Author(s)
      K.Takahashi, T.Ohtou, A.T.Putra, K.Shimizu, T.Hiramoto
    • Organizer
      Silicon Nanoelectronics Workshop, pp.95-97
    • Place of Presentation
      Rihga Royal Hotel Kyoto
    • Year and Date
      2007-06-10
    • Related Report
      2009 Final Research Report
  • [Presentation] Random Vth Variation Induced by Gate Edge Fluctuations in Nanoscale MOSFETs2007

    • Author(s)
      A.T.Putra, A.Nishida, S.Kamohara, T.Hiramoto
    • Organizer
      Silicon Nanoelectronics Workshop, pp.73-74
    • Place of Presentation
      Rihga Royal Hotel Kyoto
    • Year and Date
      2007-06-10
    • Related Report
      2009 Final Research Report
  • [Presentation] Characteristics Variation in Silicon Nanowire Transistors2007

    • Author(s)
      T.Hiramoto, M.Kobayashi
    • Organizer
      3rd International Nanotechnology Conference on Communication and Cooperation
    • Place of Presentation
      Brussels, Bergium
    • Year and Date
      2007-04-17
    • Related Report
      2009 Final Research Report
  • [Presentation] Experimental Demonstrations of Superior Characteristics of Variable Body-Factor (γ) Fully-Depleted SOI MOSFETs with Extremely Thin BOX of 10nm2006

    • Author(s)
      T.Ohtou, T.Saraya, K.Shimokawa, Y.Doumae, Y.Nagatomo, J.Ida, T.Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM), pp.877-880
    • Place of Presentation
      San Francisco, CA, USA
    • Year and Date
      2006-12-13
    • Related Report
      2009 Final Research Report
  • [Presentation] Experimental Study on Quantum Structure of Silicon Nano Wire and Its Impact on Nano Wire MOSFET and Single-Electron Transistor2006

    • Author(s)
      M.Kobayashi, T.Hiramoto
    • Organizer
      Technical Digests of IEEE International Electron Devices Meeting (IEDM), pp.1007-1009
    • Place of Presentation
      San Francisco, CA, USA
    • Year and Date
      2006-12-11
    • Related Report
      2009 Final Research Report
  • [Presentation] Critical Substrate Bias in Variable-Threshold Voltage CMOS with Short Channel FD SOI MOSFETs2006

    • Author(s)
      A.T.Putra, T.Ohtou, T.Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop, pp.159-160
    • Place of Presentation
      Honolulu, HI, USA
    • Year and Date
      2006-06-12
    • Related Report
      2009 Final Research Report
  • [Presentation] Impact of Parameter Variations and Random Dopant Fluctuations on Short-Channel Fully-Depleted SOI MOSFETs with Extremely Thin BOX2006

    • Author(s)
      T.Ohtou, N.Sugii, T.Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop, pp.15-16
    • Place of Presentation
      Honolulu, HI, USA
    • Year and Date
      2006-06-11
    • Related Report
      2009 Final Research Report
  • [Presentation] Multi-Gate MOSFETs with Back-Gate Control2006

    • Author(s)
      T.Hiramoto, T.Nagumo
    • Organizer
      2006 International Conference on Integrated Circuit Design and Technology (ICICDT), pp.80-81
    • Place of Presentation
      Padova University, Padova, Italy
    • Year and Date
      2006-05-25
    • Related Report
      2009 Final Research Report
  • [Book] 集積ナノデバイス2009

    • Author(s)
      平本俊郎, 内田建, 竹内潔, 杉井信之
    • Publisher
      丸善
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] ラッチ回路の電圧特性調整方法および半導体装置の電圧特性調整方法2009

    • Inventor(s)
      平本俊郎, 鈴木誠, 桜井貴康
    • Industrial Property Rights Holder
      東京大学
    • Industrial Property Number
      2009-141510
    • Filing Date
      2009-06-12
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] ラッチ回路の電圧特性調整方法および半導体装置の電圧特性調整方法2009

    • Inventor(s)
      平本俊郎
    • Industrial Property Rights Holder
      東京大学
    • Industrial Property Number
      2009-141510
    • Filing Date
      2009-06-12
    • Related Report
      2009 Annual Research Report

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Published: 2006-04-01   Modified: 2018-03-28  

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