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2011 Fiscal Year Final Research Report

Low-Power FPGA Based on Fine-grained Autonomous Supply-Voltage Control

Research Project

  • PDF
Project/Area Number 21700052
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeSingle-year Grants
Research Field Computer system/Network
Research InstitutionTohoku University

Principal Investigator

HARIYAMA Masanori  東北大学, 大学院・情報科学研究科, 准教授 (10292260)

Project Period (FY) 2009 – 2011
KeywordsFPGA / 非同期式回路 / 不揮発メモリ / 複数電源電圧 / パワーゲーティング
Research Abstract

FPGAs attract much attention since their functions and interconnection network can be reconfigured by post-fabrication programming. However, their major problem is its large area and power consumption because of their high redundancy. In this research, we develop novel architecture that can control the supply voltage and threshold voltage of each look-up table so as to minimize the power consumption under the constraint of the processing time. Moreover, we develop architecture that can gate the power when LUTs do not work.

  • Research Products

    (12 results)

All 2011 2010 2009

All Journal Article (6 results) (of which Peer Reviewed: 6 results) Presentation (6 results)

  • [Journal Article] Implementation of a Low-Power FPGA Based on Synchronous/Asynchronous Hybrid Architecture2011

    • Author(s)
      Shota ISHIHARA, Ryoto TSUCHIYA Yoshiya KOMATSU, Masanori HARIYAMA , Michitaka KAMEYAMA
    • Journal Title

      IEICE Trans. Elec

      Volume: Vol.E-94-C, No.10 Pages: 1669-1679

    • Peer Reviewed
  • [Journal Article] A Low-Power FPGA Based on Autonomous Fine-Grain Power Gating2011

    • Author(s)
      Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      IEEE Trans. VLSI Systems

      Volume: Vol.19, No.8 Pages: 1394-1406

    • Peer Reviewed
  • [Journal Article] A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals2011

    • Author(s)
      Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama and Michitaka Kameyama
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol.17, No.5-7 Pages: 553-580

    • Peer Reviewed
  • [Journal Article] Evaluation of a Self-Adaptive Voltage Control Scheme for Low-Power FPGAs2010

    • Author(s)
      Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      Journal of Semiconductor Technology and Science

      Volume: Vol.10, No.3 Pages: 165-175

    • Peer Reviewed
  • [Journal Article] An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture2010

    • Author(s)
      Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      IEICE Trans. on Elec

      Volume: Vol.E93-C, No.8 Pages: 1338-1348

    • Peer Reviewed
  • [Journal Article] A Switch Block Architecture for Multi-Context FPGAs Based on Ferroelectric-Capacitor Functional Pass-Gate Using Multiple/Binary Valued Hybrid Signals2010

    • Author(s)
      Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      EICE Transaction on Information and Systems

      Volume: Vol.E93-D, No.8 Pages: 2134-2144

    • Peer Reviewed
  • [Presentation] An FPGA Based on Synchronous/Asynchroous Hybrid Architecture with Area-Efficient FIFO Interfaces2011

    • Author(s)
      Masanori Hariyama, Yoshiya Komatsu, Shota Ishihara, Ryoto Tsuchiya, and Michitaka Kameyama
    • Organizer
      Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)
    • Place of Presentation
      Las Vegas(USA)
    • Year and Date
      2011-07-19
  • [Presentation] An Implementation of an Asynchronous FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture2011

    • Author(s)
      Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
    • Organizer
      The Asia and South Pacific Design Automation Conference(ASP-DAC)
    • Place of Presentation
      横浜
    • Year and Date
      2011-01-26
  • [Presentation] An Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture2010

    • Author(s)
      Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, and Michitaka Kameyama
    • Organizer
      Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)
    • Place of Presentation
      Las Vegas(USA)
    • Year and Date
      2010-07-13
  • [Presentation] Architecture of a Low-Power FPGA Based on Self-Adaptive Voltage Control2009

    • Author(s)
      Shota Ishihara, Zhengfan Xia, Masanori Hariyama, and Michitaka Kameyama
    • Organizer
      Proc. International SoC Design Conference(ISOCC)
    • Place of Presentation
      Busan(Korea)
    • Year and Date
      2009-11-22
  • [Presentation] An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters2009

    • Author(s)
      Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
    • Organizer
      Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)
    • Place of Presentation
      Las Vegas(USA)
    • Year and Date
      2009-07-14
  • [Presentation] A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic2009

    • Author(s)
      Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama
    • Organizer
      International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)
    • Place of Presentation
      Las Vegas(USA)
    • Year and Date
      2009-07-14

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Published: 2013-07-31  

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